Abstract—A low voltage wideband CMOS down-conversion mixer is described. The gm-boosted and the current-bleeding techniques are employed to improve the linearity of the proposed mixer. The mixer implemented by tsmc 0.18 μm CMOS process achieves maximum input third-order intercept point (IIP3) of 2.6 dBm, power conversion gains of 6.9 dB, and single side-band noise figure (SSB NF) 20.8 dB. The mixer operates over the entire 1.4–3.6 GHz LTE-advanced bands and consumes 6.5 mA of current from a 1.2 V power supply.
Index Terms—4G, CMOS, LTE-advanced, linearity, low voltage, mixer
Hung-Che Wei is with the Department of Electronic Communication Engineering, National Kaohsiung Marine University, Kaohsiung 81143, Taiwan, R.O.C. (e-mail: hcwei@mail.nkmu.edu.tw).
Cite: Hung-Che Wei, "A Low Voltage Wideband CMOS Mixer with High Linearity," International Journal of Modeling and Optimization vol. 2, no. 1, pp. 7-10, 2012.
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